A new technical paper titled “PPAC Driven Multi-die and Multi-technology Floorplanning” has been published by Texas A&M University and Duke University. The paper discusses the challenges of floorplanning in heterogeneous integration, where different dies use distinct technologies. The study focuses on simultaneous technology selection, considering factors like performance, power, and cost in addition to area and wirelength. The researchers developed a simulated annealing method and reinforcement learning techniques for floorplanning. Experimental results showed that these techniques outperformed a naive baseline approach. The paper, authored by Roman-Vicharra, Cristhian, Yiran Chen, and Jiang Hu, was published on arXiv in February 2025. This systematic study of multi-die and multi-technology floorplanning offers new insights and methods for optimizing floorplanning across multiple dies with different technologies. The research sheds light on the importance of considering various factors beyond just area and wirelength in floorplanning, with implications for improving performance and reducing costs in heterogeneous integration processes. This paper provides valuable information for researchers and engineers working in the field of semiconductor technology and integrated circuit design.
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